Design clocked sequential circuit of the following state diagram by using JK flip-flop

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From the state diagram two flip-flips are needed to represent the four states and are designated QoQ1. The input variable is labelled x

State Table:

Present State Next State
Q0 Q1 X = 0 X = 1
Q0 Q1 Q0 Q1
0 0 0 1 0 0
0 1 0 1 1 0
1 0 1 1 1 0
1 1 1 1 0 0

Excitation Table using j-k Flip-Flops

Present State Input Next State Flip-flop inputs
Q0 Q1 x Q0 Q1 J0 K0 J1 K1
0 0 0 0 1 0 x 0 x
0 0 1 0 0 0 x 0 x
0 1 0 0 1 0 x x 0
0 1 1 1 0 1 x x 1
1 0 0 1 1 x 0 1 x
1 1 0 1 1 x 0 x 0
1 1 1 0 0 x 1 x 1

K-map simplification

For J0:

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For K0:

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For J1:

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For K1:

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The logic diagram of the sequential circuit is

Design clocked sequential circuit of the following state diagram by using JK flip-flop | CSIT Guide

 

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