Describe the following process of IC production: (a) Oxidation, (b) Pattern definition, and (c) Doping.

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Step i: Coat Si with oxide then with photoresist (Oxidation).

User Loaded Image | CSIT GuideAt first the Silicon single crystal is oxidized in an oxidation furnace to form a thin layer of SiO2, which is excellent barrier against diffusion. The oxide layer is grown by heating the silicon wafer to temperatures ranging between 1000°C and 1200°C in an atmosphere of either pure oxygen or steam. The thickness of the oxide layer depends on the oxidation time and the temperature and the composition of the atmosphere in which the oxidation is performed. By careful selection of these three parameters, the exact thickness of the layer can be controlled. A layer 0.1 μm thick can be grown in one hour at T = 1000°C, in pure oxygen. In the same time, a layer 0.5 μm thick grows in a steam environment. Again coat the wafer with a radiation sensitive polymer film called the photo resist. Spin the silicon wafer very fast so that coating is uniform.

Step ii: Expose to radiation and develop the pattern.

User Loaded Image | CSIT GuideAllow the UV radiation to fall on photo resist through mask. A mask is a glass plate with transparent and opaque regions made on it. Only those regions of the mask which are transparent allow the radiation to fall on the semiconductor. Only those portions which are exposed to radiation, their properties are going to change. The photo resists from the exposed regions are removed. Now the mask pattern is transferred to top of wafer.

2. Doping

An integrated circuit has informal name chip. The formation of circuit components in a chip is achieved by the selective introduction of donor and acceptor impurities into the Si wafer to create localized n-type and p-type regions. The two most commonly used techniques for doping are diffusion and ion implantation.

Diffusion

When Si is heated to temperature in the range of 1000°C, some of the semiconductor atoms move out of their lattice sites, leaving behind empty lattice sites that can migrate through the sample. If the heating is done in an atmosphere of either acceptors or donors, these impurity atoms move into the vacant lattice sites formed at high temperature. The diffusion of the dopant impurities can be stopped ny cooling down the wafer. Because the diffusion of impurities is time and temperature dependent, the depth of the diffusion layer can be controlled by varying these two parameters. The SiO2 pattern, formed by photolithography acts as a mask that permits the diffusion of the impurities only in specific regions of the wafer.

The open furnace tube system using solid, liquid and gaseous dopant sources is the most common diffusion technology used in IC fabrication. The wafers are loaded vertically into a quartz boat and put into the furnace where the wafers are heated to high temperature. In general, diffusion system are similar to oxidation furnace.

b. Ion Implantation

Ion implantation is an engineering process by which ions of a material are accelerated in an electric field and impacted into a solid. This process is used to change the physical, chemical or electrical properties of solid. Ion implantation is used in semi conductor device fabrication and in metal finishing as well as in various applications of material science research.

User Loaded Image | CSIT Guide

An ion implantation equipment consists of an ion source where plasma of desired impurity are produced, an accelerator where the ions are accelerated to a high energy and a target chamber where the ions impinge on a target which is the material to be implanted. An analyzer magnet bends the ion bean through a right angle to select the desired impurity ion. Scanning system consist of a vertical scanner and a horizontal scanner which provides necessary deflection to give a uniform implantation and to build up the desired dose.

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