Digital System Design
This course contains the introductory part of combinational Logic along with the clear concepts of K-Maps and Quine- Mc Cluskey Method. It also introduces sequential networks with flip flops and FSM. Another concept includes FPGA and VHDL and also testing and verification.
Tribhuvan University
Institute of Science and Technology
Dsd Model Qn
Bachelor Level / elective-iii-semester / Science
Computer Science and Information Technology( CSC417 )
Digital System Design
Full Marks: 60 + 20 + 20
Pass Marks: 24 + 8 + 8
Time: 3 Hours
Candidates are required to give their answers in their own words as far as practicable.
The figures in the margin indicate full marks.
SECTION A
Attempt any TWO question.
Define minimal sum and minimal product. Find minimal sum and minimal product for the function using K-map.
F(abcd) = Σ(6,7,9,10,13) + Σ(1,4,5,11,15)
Find all the prime implications of a function using Quine Mc Clusky Method.
F(abcd) = Σ(7,9,12,13,14,15) + d(4,11)
What are direct command flip flops? Explain briefly about its types.
SECTION B
Attempt any EIGHT question.
Differentiate between TTL and CMOS circuit families.
Explain Shannon’s Expansion with an example.
Construct the maps of the following functions:
F= A’B’D+A’BC+ABD+AB’C’D’+A’BC’D
What is an Edge Triggered Flip Flop? Explain with an example.
List out the differences between PAL and PLA.
Given an FSM. What is the output sequence for the given data sequence 001010110110110111. Explain the behavior of the FSM. Which flip flop can be used for it?
Explain the logical and relational operators used in VHDL.
What do you understand by SA0 and SA1? Explain.
Write short notes on any two
- IC Manufacturing
- Programmable gate array
- Fault detection